Process: TSMC12FF

3198.72um * 3198.72um

Post-shrink(/1.02) = 3136um * 3136um

Seal ring post-shrink = 21.6um per edge

Post-shrink die size with seal ring = 3179.2um * 3179.2um

Gates=77048440 Cells=234402 Area=8520941.2 um^2

Clock frequency: 400~500MHz@ss_0p72_m40, 600MHz@tt_0p80_85C

LVT: 41%

Static IR drop: 8mV (1%) < 2.25%